CAM Signoff Checklist

  - Finish clock trees - done 10/15/91
    Redone 12/3/91
    Redone 2/5/92

  - Recheck timing

  - Check that each ff has correct clock - done 12/3/91

  - Check that each ff has correctly sync'd input - done 12/3/91

  - Test with fast and slow pb_clk
    - reg test w/dcam1x, fast pb_clk 10/21/91
    - reg test w/dcam1x, slow pb_clk 10/21/91
    - sys1 test, slow pb_clk 10/23/91

  - Recheck test vectors
    - supersynchronous--done 10/22/91
      redone 2/6/92
      redone 2/10/92
    - toggles--done 10/22/91
      redone 2/6/92
      redone 2/10/92
    - profault
      done 2/6/92
      redone 2/10/92

  - Make a model with 6 *full* chips (5 interface and 1 cam)
    and run register test.