- TAR reg  10 = broadcast
           11 = LUT select (16 bit counter)

- select on glue is effective only if the selected chip is
  not driving the glue line which select it.


6/12/90 called Cadence re DFF primitive which is found in their
  VTI library.  DFF and others are defined in the file
  /im/verilog/vlsi/vlsi_1.0u/udp/vlsi_udps.vmd
  (spoke to Ray Salemi).

- vtiplot <filename> creates a vti shell file which can plot
   all files after the named file (but not including the named file).

- any bus error while writing the scan start should prevent the
  scan from starting.


- for the interface chips, assign the clock tree to a signal
  which doesn't toggle often (use the reset line) to save power.
  Connect the clock tree to the same pin as the interface reset
  pins.  Use the config pins to select the source of the reset
  for all chips (from either the clock tree or the CAM reset pin).

- Does the graphics card support burst mode?

- when the CAM chip sends invalid data, the data
  must be all 0's

- Pbus protocol for r/w line:

  if iosel is low for 1 valid bit:
    that bit is parity and the operation is write reg 0

  if iosel is low for 2 valid bits:
    the first bit is parity.
    if the second bit is 0, the operation is read reg 0
    if the second bit is 1, the operation is write reg 1

- parity will be ignored until the parity interrupt is enabled