#cell2 * binarybus txt * 1 any 0 v8r1.5
# "31-Aug-90 GMT" "18:32:53 GMT" "31-Aug-90 GMT" "18:32:53 GMT" dh * .
## This file was created by VLSIvector      #
##  VLSIvector options selected for this file were :
##  AllOutputsTested  TabularOutput  ClockInSim


## Set Aliases  #
set alias l set input low
set alias h set input high
set alias x set input unknown
set alias lz set charged low
set alias hz set charged high
set alias xz set charged unknown
set alias sz set charged *
set alias siv set input vector
set alias scv set charged vector
set alias SEB set external bidirectional
set alias SEI set external input
set alias SEO set external output
set alias echo echo ()

## Set Trace Info                          #
set trace mode tabular
set trace interval 2 2
set options -tabularreportonchange
set output [trc]binarybus only

###  SET EXTERNAL SIGNALS  ##
SEI  pbclk lsin /clr din wr rs2in rs1in
SEO  lsout rs2out d2out rs1out d1out

###  SET EXTERNAL CAPACITANCE  ##

###  WATCH SIGNALS   ###
watch   pbclk lsin /clr din wr rs2in rs1in lsout
watch    rs2out d2out rs1out d1out

set power high vdd
set power low vss

###   INITIALIZE CLOCKS   ###
set clock pbclk  1(20)  0(20)