# chipf_tv.txt

# fsmchip timing verifier command file


# note: you cannot put a comment at the end
#   of a line--the # must be the first character
#   in the line.

# start timing verifier 
tv

set prompting off
load [sim]pred077
load chipf
set option noblast
set padslimit 2

set stable p54
set stable p55

### sbus signals ###

# ack[2]
set capacitance 100 p2

# ack[1]
set capacitance 100 p3

# ack[0]
set capacitance 100 p4

# sb_br
set capacitance 100 p27

# sb_rd
set capacitance 100 p52


# sb_pa[16] (input)
# set capacitance 100 p14

# sb_lerr (input)
# set capacitance 100 p38

# sb_reset_n (input)
# set capacitance 100 p53



### pbus signals ###

# eofin
set capacitance 100 p12

# eofout
set capacitance 100 p23

# iosel
set capacitance 100 p24


### interchip signals ###

# hstop
set capacitance 20 p15

# prom_dr_n
set capacitance 20 p22

# param_dr_n
set capacitance 40 p5

# eosi
set capacitance 40 p6

# sc[2]
set capacitance 40 p31

# sc[1]
set capacitance 40 p32

# sc[0]
set capacitance 40 p33

# pc[1]
set capacitance 40 p45

# pc[0]
set capacitance 40 p46

# tmint
set capacitance 30 p47

# sv_ld
set capacitance 40 p48


# incadr
set capacitance 40 p34

# sld
set capacitance 40 p30

# sbus_err
set capacitance 100 p35

# ps16
set capacitance 40 p42

# pspty
set capacitance 40 p41

# pcwr
set capacitance 10 p40

# pldec
set capacitance 40 p39

# ldctl
set capacitance 40 p37

# sv_en
set capacitance 40 p36

# sv_on
set capacitance 40 p7

# op_shift
set capacitance 40 p8

# ptr_inc
set capacitance 40 p9

# sv_sel
set capacitance 40 p10

# sdr
set capacitance 40 p11

# cw
set capacitance 40 p29

# flg8
set capacitance 80 p28

# sclr_n
set capacitance 80 p50

# partial_xfer
set capacitance 40 p51


### inputs ###

# rd
# set capacitance 10 p49


### display delays ###

# ack[2]
show delay start p13 end p2

# ack[1]
show delay start p13 end p3

# ack[0]
show delay start p13 end p4

# sb_br
show delay start p13 end p27

# sb_rd
show delay start p13 end p52

# sb_pa[16] (input)
show worst p14

# sb_lerr (input)
show worst p38

# sb_reset_n (input)
show worst p53


### pbus signals ###

# eofin (input)
show worst p12

# eofout
show delay start p26 end p23

# iosel
show delay start p26 end p24


# prom_dr_n
show delay start p13 end p22

# param_dr_n
show delay start p13 end p5

# eosi (input)
show worst p6

# sc[2]
show delay start p13 end p31

# sc[1]
show delay start p13 end p32

# sc[0]
show delay start p13 end p33

# pc[1]
show delay start p26 end p45

# pc[0]
show delay start p26 end p46

# tmint
show delay start p13 end p47

# sv_ld
show delay start p13 end p48


# incadr
show delay start p13 end p34

# sld
show delay start p13 end p30

# sbus_err
show delay start p13 end p35

# ps16
show delay start p26 end p42

# pspty
show delay start p26 end p41

# pcwr
show delay start p26 end p40

# pldec
show delay start p26 end p39

# ldctl
show delay start p26 end p37

# sv_en
show delay start p13 end p36

# sv_on
show delay start p13 end p7

# op_shift
show delay start p26 end p8

# ptr_inc
show delay start p26 end p9

# sv_sel
show delay start p13 end p10

# sdr
show delay start p13 end p11

# cw
show delay start p26 end p29

# flg8
show delay start p26 end p28

# sclr_n
show delay start p13 end p50

# partial_xfer
show delay start p13 end p51


### inputs ###

# hstop
show worst p15

# rd
show worst p49