#cell2 * dataout txt * 3 any 0 v8r1.5
# "10-Jul-90 GMT" "16:59:11 GMT" "10-Jul-90 GMT" "16:59:11 GMT" dh * .
## This file was created by VLSIvector      #
##  VLSIvector options selected for this file were :
##  TabularOutput  ClockInSim


## Set Aliases  #
set alias l set input low
set alias h set input high
set alias x set input unknown
set alias lz set charged low
set alias hz set charged high
set alias xz set charged unknown
set alias sz set charged *
set alias siv set input vector
set alias scv set charged vector
set alias SEB set external bidirectional
set alias SEI set external input
set alias SEO set external output
set alias echo echo ()

## Set Trace Info                          #
set trace interval  2 1
set trace mode tabular
set option -tabularreportonchange
set output [trc]dataout only

###  SET EXTERNAL SIGNALS  ##
SEI  sc[1] sc[0] pc[1] pc[0] pb_d[7] pb_d[6] pb_d[5] pb_d[4] pb_d[3]
SEI  pb_d[2] pb_d[1] pb_d[0] pb_clk /rst pld1 pld2 pld3 pld4 flg8
SEO  douth[7] douth[6] douth[5] douth[4] douth[3] douth[2] douth[1]
SEO  douth[0] doutl[7] doutl[6] doutl[5] doutl[4] doutl[3] doutl[2]
SEO  doutl[1] doutl[0]

###  SET EXTERNAL CAPACITANCE  ##


###  DEFINE VECTORS    ##
vector sc[1:0] sc[1] sc[0]
vector pc[1:0] pc[1] pc[0]
vector douth[7:0] douth[7] douth[6] douth[5] douth[4] douth[3] douth[2] -
 douth[1] douth[0]
vector doutl[7:0] doutl[7] doutl[6] doutl[5] doutl[4] doutl[3] doutl[2] -
 doutl[1] doutl[0]
vector pb_d[7:0] pb_d[7] pb_d[6] pb_d[5] pb_d[4] pb_d[3] pb_d[2] -
 pb_d[1] pb_d[0]

###  WATCH SIGNALS   ###
watch pb_clk /rst flg8 pld1 pld2 pld3 pld4 sc pb_d  douth doutl


set power high vdd
set power low vss

###   INITIALIZE CLOCKS   ###
set clock pb_clk  1(20)  0(20)