p addr_pipe addr\char"5F{}pipe
p bex29 bex29
p bex30 bex30
p bex35 bex35
p busif busif
p cam cam
p cntr5_dn cntr5\char"5F{}dn
p cntr6_dn cntr6\char"5F{}dn
p cntr7_dn cntr7\char"5F{}dn
p cntr8_dn cntr8\char"5F{}dn
p cntr8_sr cntr8\char"5F{}sr
p cntr8_src cntr8\char"5F{}src
p cntr8_ud_sr cntr8\char"5F{}ud\char"5F{}sr
p data_path data\char"5F{}path
p dim_reg dim\char"5F{}reg
p dram_cnt_reg dram\char"5F{}cnt\char"5F{}reg
p dram_ctrl dram\char"5F{}ctrl
s dram_ctrl1 dram\char"5F{}ctrl1
p dram_if dram\char"5F{}if
p est_dly est\char"5F{}dly
p evc_control evc\char"5F{}control
p event_ctr event\char"5F{}ctr
p glue_cmp glue\char"5F{}cmp
p glue_decode glue\char"5F{}decode
p glue_output_mux glue\char"5F{}output\char"5F{}mux
p glue_pipe glue\char"5F{}pipe
p glue_reg glue\char"5F{}reg
p glue_xin_mux glue\char"5F{}xin\char"5F{}mux
p glue_yin_mux glue\char"5F{}yin\char"5F{}mux
p glue_zin_mux glue\char"5F{}zin\char"5F{}mux
p hw_env_reg hw\char"5F{}env\char"5F{}reg
p interrupt_reg interrupt\char"5F{}reg
p kick_cy_h kick\char"5F{}cy\char"5F{}h
p kick_cy_l kick\char"5F{}cy\char"5F{}l
p kick_reg kick\char"5F{}reg
p lutmac_reg lutmac\char"5F{}reg
p mfct_sync mfct\char"5F{}sync
p mff_sync_init mff\char"5F{}sync\char"5F{}init
p mpc_reg_a mpc\char"5F{}reg\char"5F{}a
p mpc_reg_b mpc\char"5F{}reg\char"5F{}b
p mux24_1 mux24\char"5F{}1
p mux29_1 mux29\char"5F{}1
p mxr24_1 mxr24\char"5F{}1
p mxr24_1a mxr24\char"5F{}1a
p mxr24_1b mxr24\char"5F{}1b
p nibble_fifo nibble\char"5F{}fifo
p nibble_pipe nibble\char"5F{}pipe
p node node
p node_data node\char"5F{}data
p node_iosel node\char"5F{}iosel
s node_rwfsm node\char"5F{}rwfsm
p node_rwfsm_t node\char"5F{}rwfsm\char"5F{}t
p node_status node\char"5F{}status
s nodefsm nodefsm
p nodeio nodeio
p offset_reg offset\char"5F{}reg
p opc_dcd opc\char"5F{}dcd
p opc_reg opc\char"5F{}reg
p par_ser par\char"5F{}ser
p reg_len_dcd reg\char"5F{}len\char"5F{}dcd
s reg_len reg\char"5F{}len
p reg_out_mux reg\char"5F{}out\char"5F{}mux
p run_reg run\char"5F{}reg
p sc_latch sc\char"5F{}latch
p scan scan
s scan1 scan1
p scan_dly scan\char"5F{}dly
p scan_gen scan\char"5F{}gen
p scan_reg scan\char"5F{}reg
p ser_latch ser\char"5F{}latch
p serial_in serial\char"5F{}in
p site_gen site\char"5F{}gen
p sram_if sram\char"5F{}if
p src_delay src\char"5F{}delay
p src_mxr src\char"5F{}mxr
p ssr_decode ssr\char"5F{}decode
p sync_dcd sync\char"5F{}dcd
p vwe_reg vwe\char"5F{}reg
