p ack_reg ack\char"5F{}reg
p bus16_2 bus16\char"5F{}2
p ci_sync ci\char"5F{}sync
p clrsync clrsync
p cmd_reg cmd\char"5F{}reg
p control control
p controlreg controlreg
p csvsel csvsel
p ctlsvchip ctlsvchip
p datain datain
p dataout dataout
p dataregs dataregs
p davsel davsel
p davsync davsync
p din_ctl din\char"5F{}ctl
p din_sel din\char"5F{}sel
p dinreg dinreg
p dnct_ctl_1 dnct\char"5F{}ctl\char"5F{}1
p dnctr16_a dnctr16\char"5F{}a
p dnctr4 dnctr4
p dnctr4_a dnctr4\char"5F{}a
p dnctr4_b dnctr4\char"5F{}b
p dnctr8 dnctr8
p donep_stat donep\char"5F{}stat
p donesync donesync
p dout_sel dout\char"5F{}sel
p dout_stat dout\char"5F{}stat
p doutreg doutreg
p drdsync drdsync
p eos_dec eos\char"5F{}dec
p eosi_dcd eosi\char"5F{}dcd
p errorgen errorgen
s fsm_dec fsm\char"5F{}dec
s fsm_enc fsm\char"5F{}enc
p fsmchip fsmchip
p hnp_ctl hnp\char"5F{}ctl
s hnp_fsm hnp\char"5F{}fsm
p ifc_rst ifc\char"5F{}rst
p int_cond int\char"5F{}cond
p int_reg int\char"5F{}reg
p ldsel ldsel
p opcode_reg opcode\char"5F{}reg
p pb_ctl pb\char"5F{}ctl
p pb_rd pb\char"5F{}rd
p pb_wr pb\char"5F{}wr
p pbus_ctl pbus\char"5F{}ctl
s pctlfsm pctlfsm
s prdfsm prdfsm
p ps_sync ps\char"5F{}sync
p ptr_reg ptr\char"5F{}reg
s pty pty
p ptygen8 ptygen8
s pwrfsm pwrfsm
p reg_1 reg\char"5F{}1
p s_psyn s\char"5F{}psyn
p sb_drv sb\char"5F{}drv
p sb_va_gen sb\char"5F{}va\char"5F{}gen
s sbugfixfsm sbugfixfsm
p sbus_ctl sbus\char"5F{}ctl
s sctlfsm sctlfsm
p sedge sedge
p slave slave
p slavereg slavereg
s srdfsm srdfsm
p sv_oncircuit sv\char"5F{}oncircuit
p sv_sbug sv\char"5F{}sbug
s svfsm svfsm
s swrfsm swrfsm
p sync_ctr sync\char"5F{}ctr
p sync_encode sync\char"5F{}encode
s sync_fsm sync\char"5F{}fsm
p sync_gen sync\char"5F{}gen
p timer4 timer4
p tmctr tmctr
p upctr16 upctr16
p upctr2 upctr2
p upctr2_a upctr2\char"5F{}a
p upctr3 upctr3
p upctr4 upctr4
p upctr4_a upctr4\char"5F{}a
p upctr8 upctr8
p wait_stat wait\char"5F{}stat
p wr_dav wr\char"5F{}dav
p xsync xsync
