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\chapter{\Cam\ box}\label{sect.box}

\section{Overview}\label{sect.box-overview}

As we explained in \chapt{block-structure}, when a three-dimensional
torus is flattened onto three-dimensional space, eight separate
strands of the torus are brought together. A \cam\ box is responsible
for simulating the activity of a \cam\ {\em block}, i.e., a
sector-size window cutting through all eight strands (cf.\
\fig{4strand}).  The entire torus can then be simulated by arraying in
a straightforward way an appropriate number of boxes in the three
dimensions of ordinary physical space.\footnote
	{Note that while the eight strands that run
through the boxes are interconnected so as to yield the topology of a
torus, the physical array of boxes forms an ordinary {\em
parallelepiped}: opposite faces don't have to be brought together!}

Besides the resources directly devoted to the simulation (site-data
transport and interaction), a \cam\ system makes uses of other
resources (e.g., clock distribution, communication with the host) that
must somehow be distributed and interconnected in an indefinitely
expandible way within the same geometric framework as the blocks.  It
is natural to lump such resources on a per-block basis and incorporate
one lump in each box. Thus, while the module represents the smallest
repetitive unit of \cam\ from a functional viewpoint, in physical
terms it is the box that represents the smallest repetitive
unit---from which an arbitrarily large \cam\ system can be built by
mere juxtaposition and nearest-neighbor interconnection.

\medskip

Physically, a \cam\ box is a roughly cubical enclosure containing a
regulated power supply and a motherboard with eight slots---for up to
eight \cam\ modules. Additional circuitry on a per-box basis is
present on the motherboard. Though, for convenience, some or all of
this circuitry may reside on a card that plugs into a ninth slot of
the motherboard, we shall still refer to it as `motherboard
circuitry'.

As outlined in \sect{box-array}, a box interfaces to the outside world
through three groups of signals, namely {\em glue} signals and {\em
\bus} signals, which travel between boxes (\sect{interbox}), and {\em
data stream} signals (data flywheel and video output), which allow
external equipment to have real-time access to the box's internal data
stream.

The signals of each group are bundled into one or more {\em ports}
according to their geographical destination. Thus, the glue signals
are divided into six glue ports according to which of the six adjacent
boxes they connect to. Each port, in turn, is physically represented
by one or more {\em connectors} into which cable headers may be
plugged. For convenience, also configuration and test signals are
grouped together and brought to connectors.

\medskip

In the present implementation, all of the above connectors (which deal
with those signals that the box makes available externally) are on the
motherboard, independently of whether the signals themselves are
generated (or received) by motherboard circuitry or by 
circuitry on the individual modules.

\fig{motherboard} gives a simplified backview of the motherboard, showing the
individual connectors and their groupings as ports. The modules
plug in on the other side of the motherboard, and many of the port
connectors are just through-the-board extensions of
connectors on the modules.

	\figpagegiven{motherboard}{\psfig{figure=fig/motherboard.ps}}
{Simplified backview view of the \cam-box motherboard. Dotted lines
delimit ports, each consisting of one or more connectors.
The small connectors on the glue ports are for clock-phase
feedback between adjacent modules.}


\section{Glue ports}\label{sect.glue-ports}

Each module contributes to its box six glue connectors ({\sym XM glue}
through {\sym ZP glue}; cf.\ \fig{sector} and \fig{mod-pins}) for
bidirectional communication between adjacent sectors. On the box, each
{\em glue port} brings together a set of eight homologous connectors
(one from each module), so that, for instance, the eight {\sym XM
glue} connectors come together as the box's {\sym XM glue} port
(\fig{motherboard}).  Each glue port has, in addition, a small
connector with two signals ({\sym Clock Phase In} and {\sym Clock
Phase Out}), handled by the motherboard circuitry, which
exchange clock phase information between the local clock masters
(\cf{clock-sync}) of adjacent boxes.

Thus, between the {\sym XP glue} port of a box and the {\sym XM glue}
port of the box next to it in the positive $x$ direction there will
run 128 bidirectional glue lines (16 layers times 8 strands)
plus 2 clock-phase lines, for a total of 130 signal lines.

\medskip

Note that the six physical directions {\sym XM}, {\sym XP}, \ldots,
{\sym ZP} are distinct from the six {\em logical} directions, denoted
by $x_-$, $x_+$, \ldots, $z_+$, which refer to the orientation of an
individual strand. Typically, the {\sym XM glue} port will be configured as
an $x_-$ port by four of the modules in a box, and as an $x_+$ port by
the remaining four (cf.\ \fig{}). A more general
remapping of logical ports to physical ports is possible; for instance,
when the three-dimensional array of modules is configured as a pleated
two-dimensional array (\sect{}), a {\sym Z} port may be used to
carry $y$ information.

On each of the external faces of the parallelepiped---where a box is
not mated to an adjacent box---four of the strands double back on the
other four via the glue signals. For example, on an {\sym XM} face,
the four {\sym XM glue} signals that carry $x_-$ information (cf.\ \fig{})
for a certain layer will fold back onto the corresponding four {\sym
XM glue} signals that carry $x_+$ information. This is done by a passive
shorting plug or by an internal multiplexer (\cf{}).  In a similar
way, a {\sym Clock Phase Out} signal that emerges from an external
face of the parallelepiped is looped back into the corresponding {\sym
Clock Phase In} pin.


\section{Data flywheel ports}\label{sect.flywheel-ports}

On each \chip, real-time (``on-the-fly'') access to the internal data
stream is provided by two taps on this stream, namely {\sym Data
Flywheel Output} and {\sym Data Flywheel Input} (\sect{flywheel}). On
the module, these sixteen outputs and sixteen inputs are brought
together on a {\sym Data Flywheel} connector (\fig{mod-pins}) together
with the appropriate timing signals. In turn, this connector
is passed through to the motherboard as a {\sym Data flywheel} port,
for a total of eight such ports (\fig{motherboard}).

\medskip

Data flywheel access is optional, and is provided for
advanced experimentation, custom applications, attachment of custom
hardware, specialized display or analysis needs, and in-depth testing
and diagnostics. 

As implemented in the standard \cam\ box described here, the {\sym
Data flywheel} ports are meant to provide direct real-time access to
simulation data from any one module of a \cam\ machine, or at most a few
modules: it would be physically impractical to connect external
equipment to all modules at once. On the other hand, using specially
designed boxes, it would be feasible to use the {\sym Data Flywheel}
connectors to add an external ``coprocessor'' to each module or group
of modules.


\section{Video port}\label{sect.video-port}

A separate {\sym Video} tap (\sect{flywheel-pins}, \sect{}) on each
\chip's internal data stream extracts data intended for real-time
video display. On a module, these sixteen signals are brought out to
the {\sym Raw video} connector (\fig{mod-pins}).  On the motherboard,
the sixteen {\em Raw video} signals are bussed across the eight
modules of a box (\cf{local-bus}); only one module at a time will have
its tri-state bus drivers enabled. The {\sym Video} port on the
motherboard provides a buffered version of these sixteen raw-video
signals, together with horizontal and vertical sync signals suitable
for driving a {\sc crt} monitor.

Signal conditioning circuitry on the motherboard takes in the raw
video signals and puts out, throught the {\sym Video} connector,
appropriately formatted video output (such as analog and Horizontal
and Vertical Sync).

It is desirable to turn the raw video into analog Red, Green, and Blue
suitable for a standard color monitor, by means of a downloadable
color palette and digital-to-analog converters. Though these
functions may be provided by external circuitry having access to
buffered raw video, eventually they should be provided by
the motherboard itself. At any rate, pins for {\sc rgb} output
are reserved on the {\sym Video} port.

\medskip

Typically, a dedicated \crt\ monitor permanently connected to the
{\sym Video} port of one of the boxes will be used to provide a
real-time, sector-size window on the simulation data; this window can
be panned at will through the site array.


\section{\bus\ ports}\label{sect.bus-ports}

A box also acts as a relay for {\em \bus} signals (\sect{}), receiving
the \bus\ via a {\sym \bus\ root} connector on the motherboard and
fanning it out to up to three adjacent boxes (in the {\sym XP}, {\sym
YP}, and {\sym ZP} directions) via the {\sym \bus\ branch} connectors
(\fig{motherboard}). Since \bus\ relaying is done by the modules of
behalf of the box, there are on the motherboard eight connectors (one
on each module slot) available for the {\sym \bus\ branch} function,
with the potential for fanning the \bus\ out to eight boxes.  However,
no more than three of these connectors are used, since \bus\
distribution is organized on a three-dimensional tree basis
(\cf{box-array}).


\section{Local bus}\label{sect.local-bus}

Besides relaying the \bus\ to other boxes via the {\sym \bus\ branch}
ports, the motherboard also conditions and distributes the \bus\
signals to the eight modules. This is done through a {\em local bus}
(see \fig{motherboard}), which also collects {\sym Raw video} signals
from the modules (\sect{video-port}), distributes the clock, and
perform a number of miscellaneous functions.


\section{Configuration and diagnostics}

Finally, there are on the motherboard a number of pins used for
configuration, testing, and diagnostics.


