\chapter{Sample Situations for the CAM-8 I/O Interface}
     
    In this chapter we examine some situations which the input-output interface of the
CAM-8 machine must be prepared to handle.  It is assumed that there are a large
number of space modules in the given CAM-8 machine.  These modules generally
listen to the same control information from the host, but will
return different status information. 
 
\section{Situation 1}

    This is the simplest case for the I/O system to handle.  It also
probably represents the most typical usage of the CAM-8 machine.  In
Situation 1, the I/O system must initialize the DRAM and SRAM
chips with data and lookup table information respectively.

     Thereafter, the host prompts the modules with a `GO' command 
after every sweep is completed.  Each such command represents a particular
step in the cellular automata experiment that is being conducted.  When the 
experiment is
done, the final results that have been accumulated in the
module registers and any other relevant data must be read by the host.

     No major timing problems appear here.  The host is time constrained 
neither at initialization nor at the conclusion of the experiment when it
reads the results.  The `GO' prompt that must be issued between steps
is executed by writing to a special bit register in the controller chip
register bank.

\section{Situation 2}

     Situation 2 is a bit more complicated than Situation 1 described above.
Here a count of the number of 1's in each of two selected bit planes
for a given sweep must be accumulated.  As in Situation 1, the modules
are initialized 
with control and data.  The appropriate event source select
registers are written to specify the required accumulation in the chosen 
bit planes.

     During normal operation, the host issues a `GO' command after every
sweep.  While a sweep is proceeding, the host reads the double buffered
event counters of each module associated with the monitored bit planes.  Of
course, at the end of a sweep, the modules must update these double buffered
registers with data from that sweep.  

\section{Situation 3} 

    Situation 3 involves running a repetitive cycle.  In such a cycle, the
lookup table changes for each `phase'.  However, each phase lookup table
is small enough to occupy only  a portion of the entire lookup table space.
All phase tables are stored in the SRAM.  By keeping the phase address bit
to the lookup table fixed, a given phase lookup table may be selected. 

     In this situation, the experiment is again started by initializing all
data and control information.  The lookup table source select register
for a given bit plane is set to a constant to specify the first phase.  The host
then issues a series of `GO' commands to execute that phase.  In between
sweeps at the end of that phase, the host changes the source select and
other parameters to implement the next phase.  It also reads any status
information that may be required.  Then the host issues some more `GO' commands
to complete the following phase.  This procedure is repeated until the
 experiment
is done.  Note that only control information must be changed between
sweeps here (if at all).  The lookup table remains fixed throughout the
experiment.

\section{Situation 4}

     In Situation 4 control information and/or lookup tables may need to be 
changed between sweeps.  The topology
of the system itself may be changed, although this would probably be quite rare.  Situation 4 places the
tightest constraints on the CAM-8 I/O system.

     The host would attempt to update the double buffered lookup tables as well as the control
information between sweeps.  If a total update is not possible, as much of
it is done and the following sweep is held back long enough to allow for the
required updates. 

    

