<<<<< ALLEGRO 4.1.2 P1 README FILE >>>>> **************************************************************************** * * * This file has been provided within Allegro because it contains important * * information about this release of software. Please refer to this file * * for information about bug fixes and enhancements, platform issues, and * * known problems. This file contains the following information. * * * **************************************************************************** o Sunview Information o Symbol Library Information o Environment Update Information o Bug Fixes and Feature Enhancements o System Configuration o Known Bugs in this Release o Operating System Information o Index of 4.1 Application Alerts o Customer Support Information If you have questions or concerns with this release, please call the Customer Support Center at 1-800-447-2253. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALLEGRO IN SUNVIEW Allegro's performance under SUNVIEW was improved for the 4.0 release. The performance now matches standalone Allegro in cases where the Allegro window is not obscured by other SUNVIEW windows. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 SYSTEM CONFIGURATION This is a production release of Allegro software for Sun workstations. In addition to supporting Sun3's, based on the Motorola 68020 CPU, and Sun4's, based on the Sun4 SPARC CPU, ( Contact your local Valid salesperson for specific Allegro supported model numbers), Allegro 4.1 also supports the new Sun3 workstations based on the Motorola 68030 CPU, and the new Sun4 workstations based on the Sun 4 SPARC CPU, and the CG6 Graphics Accelerator Board (also known as LEGO). Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 OPERATING SYSTEMS Allegro 4.x Release History Allegro Release Description 4.0 P1 First Allegro 4.x release 4.0.1 P1 Bug fix release to 4.0 4.1 P1 First release of five new features and bug fix to 4.0.1 4.1.1 P1 Patch to fix Sun OS4.1 problems running Allegro 4.1.2 P1 More fixes for Sun OS4.1 problems, autocentering fixes in plotting, and install_printcap fix for paper tape punch Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 RUNNING ON SUN OS4.1 The 4.1.2 modification corrects two problems encountered when running Allegro Release 4.1 under Sun OS 4.1: o When you run Allegro in a Sun window and perform any Allegro- intensive operations (for example, automatic routing, update_drc, void entire shape, etc.), you cannot perform tasks in other Sun windows. o When you open a Sun window that overlaps Allegro and then close the window to an icon, that part of the Allegro design that was hidden by the window is not refreshed until you move your cursor out of the Allegro window and into another Sun window or the Sun desktop. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 Sun4/Sparc workstations with GX and SunOS 4.1 ******************************************************************** * * * You must follow the additional installation instructions in * * the 4.1 P1 release notes if you are running Allegro 4.1 on * * Sun4 workstations with a GX graphics card and SunOS 4.1. * * * ******************************************************************** Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 Executing the install_printcap Script The install_printcap script in Allegro 4.1.1 contained an error that incorrectly set the printcap file for an NC Punch device. When the script was run, Allegro would generate the following error message: punchbin: Undefined variable When this error was encountered, Allegro deleted the printcap file. This patch contains a new install_printcap script that you can use to insstall your NC Punch device. If you do not have an NC Punch device, you can ignore this new script. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALLEGRO SYMBOL LIBRARY This release of Allegro 4.1 contains an updated 4.1 symbol library. All library symbols created with previous releases of Allegro are compatible with this software. Before loading the generic library make sure that any customized component symbols are not in /usr/valid/lib/pcb_lib. This library will be overwritten when you load the new Allegro library. Your CAE libraries will not be affected. ---------------------------------------------------------------------- | | | CAUTION | | | | The Valid Allegro library is provided as an example for your | | convenience in startup activities. The symbols are not pro- | | duction tested. Before using the Valid symbols in production | | designs, carefully review them to ensure they meet your | | company and manufacturing criteria. | | | ---------------------------------------------------------------------- Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 DATA COMPATIBILITY WITH PREVIOUS SOFTWARE RELEASES Data created on previous releases of Allegro is compatible with Allegro release 4.1. However, data created/edited on Allegro 4.x IS NOT COMPATIBLE WITH PREVIOUS MAJOR SOFTWARE RELEASES. Any drawings created or operated on by 4.X software will not function correctly when using 3.X software. Allegro 4.1 drawings will function properly when using Allegro 4.0 software. We recommend that you always use the latest version of software. Due to the bug fixes and enhancements that have been incorporated into the 4.1 release, all drawings created on any release previous to Allegro 4.0 should be updated. o To update your Allegro drawings type: uprevfix Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 SCRIPT COMPATIBILITY Allegro scripts created previous to release 4.0, should be updated to make them compatible with Allegro 4.X functionality. o Use the following command to update your Allegro scripts: script_convert Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* * * * * * * * BUG FIXES & FEATURE ENHANCEMENTS IN ALLEGRO 4.1 * * * * * * * *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 There have been bug fixes and feature enhancements in release 4.1. The following list highlights the significant improvements: ALLEGRO/GED INTEGRATION o When a device/symbol pin mismatch occurred during the GED2PCB process, the log file would alert you of the error but not identify which symbol was causing the problem. The symbol name is now stated in the log file. ARTWORK o When creating negative films on an imbedded plane layer containing a shape, you will now receive a warning in the photoplot.log if no thermal relief flash name is specified in a padstack and the artwork program automatically substitutes the pad geometry draw instead. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o The artwork program would add an extra line draw in your gerber .art files between the last line drawn and the first pad flashed when they both used the same aperture. This has been corrected in this release. o When using the gerber 44XX option, arcs in your board drawing are now being storing in the .art files correctly. o On positive filmsheets, all pads that fall within the area of a shape on a different net will now be flashed. A warning will be issued in the photoplot.log file. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 APERTURE EDITOR o The automatic aperture generator no longer adds a flash aperture that has no flash name. o The automatic aperture generator no longer adds more than one aperture station for a single line width. BACK ANNOTATION o After performing interactive or automatic swapping, the back annotation file created by the baf program now contains the swap information. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 CADNETIX-IN CONVERTER o The script created which adds text strings to your Allegro drawing will now add text strings from the Cadnetix database which contained imbedded quotes. o The Cadnetix-in converter now places pads in the correct location when they were built in the Cadnetix system with an offset. o The Cadnetix-In converter would create Allegro symbols and device files that had different pin counts if they were defined that way in the Cadnetix database. It will now always use the number of pins defined in the Cadnetix symbol as the pin count for both the Allegro symbol and device file. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 DERIVE CONNECTIVITY o In instances where a line runs through a pad, but not through the pad center, a database corruption no longer occurs due to the line segment added by derive connectivity from the pad center to a point on the line. o On boards containing rotated oblong pads, a software fatal error or failed connections no longer occurs. DRC o When moving, adding, or copying a symbol, you would sometimes get an erroneous drc violation of a pin on one layer to a shape on a dif- ferent layer. This problem would only occur if there was already other true DRC violations on that symbol. o Same net drc has been improved to detect some line to pad violations it did not detect in release 4.0, where a connect exits a pad and then follows a path that takes it back within the minimum drc spacing of the pad. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o The update_drc command would report that it was running, but fail to actually update the DRC status of the design if it had been invoked while another interactive command was running. This is corrected for this release. NCTAPE o On drawings with user units of mils and a decimal accuracy of 1 or more, any hole locations which fell on a fraction of a mil, utilizing the decimal accuracy, were being rounded off in the nctape file so that their locations had 0 decimal accuracy and fell on an even 1 mil coordinate. PCB_SLIDE o When using interactive commands with the "pcb_slide" feature, the pcb_editor no longer hangs whenever it tries to bubble etch around a pin where the drill size is larger than the pad size. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 PLACEMENT o When interactively or automatically placing a symbol that had a very large number of unfilled rectangles, it took a very long time to place the symbol. This has been corrected in this release. o The alternate symbol name is now always being displayed in the message line if an alternate symbol is being placed on the bottom of the board during automatic placement. PLOTTING o Elements in a plot file were always rounded off to the nearest 1 mil value, sometimes resulting in missing or incorrect lines especially on a metric drawing. You can now scale your plot files to compensate for roundoff. Set the environment variable, "plot_scale X", where X is an integer value before creating a plot file if roundoff creates a problem for you. o Diagonal lines are no longer missing when plotting a file that was created from gerber .art files using the gbplot command. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o Some users have reported that Allegro does not always compute the plot extents correctly when the plot file contains negative coordinates or when plotting at a scale greater than 1:1. This condition has been elimiinated in this release. Additionally, Allegro now calcualtes plot offsets from the center of the paper, not from the bottom left corner as in previous versions of Allegro. For example, if your offset is O,0, the plot will be centered on the paper. If the offset is 100,100, the plot will be offset 100 mils in the X direction and 100 mils in the Y direction. You should also be aware that the plotting feature now uses the full extents of the plotter. A full D-size plot would not fit on a true D-size paper because Allegro would not plot under the area of the paper that falls under the plotter wheel path. Note that using the full extents of the paper can cause smearing when using wet ink pens. To prevent smearing, plot at a scale of less than 1:1 to ensure the plot does not extend to the extents of the paper. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o After creating a plot file from a drawing with more than 2 decimal places of accuracy, you can now load the plot file into a drawing using the Load Plot command. o Plot files created on the Decstation 3100 using the explot command can now be plotted. o When plotting a full metric A4 size drawing, some data in the X axis did not plot. All data should now plot properly. o In some isolated instances, lines and connect lines were not being plotted. This has been corrected in this release. SCICARDS-IN CONVERTER o The SciCards-In converter will now add pins as Allegro test probes when they were defined in the SciCards database as test points. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 THERMAL ANALYSIS o When a thermal analysis is performed on a board in a vaccuum (no air flow), the calculations are now correct. IPC HILIGHTING o This feature would not function because the namemapper program was missing from the 4.0 P1 release tape. SYMBOL LIBRARY o All PLCC library symbols have been updated so their pinouts are now correct. TEST PREP o A system han no longer occurs if you select a standalone via not connected by any etch when manually adding or swapping a test point. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 SHAPES o There were instances where the "minimum shape area" parameter was being violated by the automatic void feature, and shape fragments smaller than the minimum shape area were being created when a shape was broken into more than one shape. This has been corrected in this release. o The automatic void feature will now add voids based on the drill hole size if it is larger than the pad defined for that shape layer. NCDRILL o A software fatal error crash no longer occurs on Sun-4 systems when creating a drill legend on very large boards where there was a very large pin count on a single drill size. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 LOAD GERBER DATA o There were some instances where the load gerber data command would terminate when trying to load english gerber files into a metric board drawing. This has been corrected for this release. SIGNAL NOISE ANALYSIS o Performance was poor when analyzing nets with many discrete component pins. Discrete component pins are now ignored when performing Signal Noise Analysis. o You can now allow top and bottom etch layers to be moved in the cross section form for performing analysis of 2 sided boards with experimental plane layers. SCRIPTS o Scripts will now replay if they contain a command with a middle mouse button selection that caused the popup to extend outside of the boundries of the current form when it was recorded. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALLEGRO CONVERTERS o The redac_in, cdx_in, and sci_in Allegro converters have all been modified so that they now automatically add vias before you have to run Derive Connectivity. The conversion programs now create a script named autoboard.scr that will build the board including vias when you run it. o The calma_in converter would fail when pin names of more than 10 characters existed in the calma database. ADD SUBCLASS o When adding an etch subclass that is specified as an imbedded plane, a shape is no longer automatically added on the new subclass. PLOT o The hp_plot script has been updated so that all supported Hewlett-Packard and Hewlett-Packard compatible plotters can be run using the hp_plot script. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o When plotting on monochrome Versatec plotters, no elements mapped to pen #1 would be plotted. NCDRILL o A software fatal error will no longer occur when creating the NCdrill legend on very large boards. NCTAPE o In previous beta releases, the nctape program would create a log file that had control characters in the log file name. o When the zero supress parameter was set to yes, a drill at location X0Y0 would be incorrect in the ncdrill tape file. NCROUTE o In previous beta releases, the ncroute file would be incorrect if the ncpath contined arcs. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 MULTIWIRE o The multiwire-in program would not process gd format files that contained any comments at the end of a data line. DISTANCE CALCULATOR o You would get a software fatal error when selecting a board symbol pin. GLOSS o The line smoothing gloss feature would sometimes report completion rates over 100% when there were null nets on the board. SLIDE o When sliding a via after having used slide with the cut option, you could create a drc violation to the via without a drc marker unless you ran the update_drc command or moved the via again. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 SCRIPTS o A script file would be recorded incorrectly and couldn't be replayed if a middle mouse popup selection was made on a popup menu that extended outside he boundries of the form it was called from. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* * * * * * KNOWN BUGS IN ALLEGRO 4.1 * * * * * * This release of Allegro has undergone extensive Alpha * * and beta feature testing. However, the following is * * a list of known bugs and deficiencies that are * * present in release 4.1 and will be addressed in * * future releases. * * * *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ARTWORK o The aperture file and parameter files may not be saved in the first directory in the ARTPATH if multiple directories are defined and the aperture or parameter file was read from the first directory in the ARTPATH. ALTERNATE SYMBOLS o If you select an alternate symbol when performing an interactive placement and the symbol cannot be found in one of the PSMPATH directories, the command will terminate. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 MOVE o User defined net schedules will be removed if you move a component after it has been placed and the schedule has been defined. o When using the stretch etch option, etch may be reconnected to the wrong segments if many overlaps of etch connects occur. DRC o When using interactive commands or running the update_drc command, the pcb_editor message line count of the total number of DRC violations created/detected will always include any same net drc violations which may be present EVEN if this feature is not enabled with same_net_DRC environment variable. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 DERIVE CONNECTIVITY o In some unusual cases, such as when etch doubles back on itself, DERIVE may process the net incorrectly, resulting in an unsuccessful connection, erroneous drc reporting, or erroneous connections that violate Allegro rules. After running DERIVE CONNECTIVITY, you should always run dbcheck to ensure drc is current and no database errors are present. If database errors are reported, manually edit to remove the problem etch or call Valid. ROUTER / GLOSS o In Pass 0 of the router, pin escape connections may be added from the side of any SMD pins that are off grid when you specify "no side entry" in the pass 0 router parameters form. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* * * * * * * * INDEX FOR APPLICATION ALERTS * * * * Sun 4.1 * * * * * *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALERT NUMBER 4.1-1: The Network File System (NFS) Overview in the use of NFS to mount remote file systems. ALERT NUMBER 4.1-2: Using Spooler Commands with Allegro Methods for accessing the spooler. ALERT NUMBER 4.1-3: Router Strategy for SMT Strategy to obtain better routing results. ALERT NUMBER 4.1-4: Shifting the Grid When Routing with 8/8 Rules Tips on shifting grids to maximize routing channels. ALERT NUMBER 4.1-5: Using Allegro Derive Connectivity A recommended operating procedure and explanation of limitations. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALERT NUMBER 4.1-6: User Units and Database Accuracy Explanation of database unit conversion in drawings to avoid roundoff problems. ALERT NUMBER 4.1-7: Using the Edit Shape Boundary Command Tips on editing shape and void boundaries. ALERT NUMBER 4.1-8: Allegro Text Database Conversion Method of using database conversion from SUN to VMS and back. ALERT NUMBER 4.1-9: Comprehensive Look at Signal Noise Analysis A series of topics discussing various aspects of the Signoise Analysis program. ALERT NUMBER 4.1-10: Installation of Peripheral Spooling and Automatic Switch Describes installation for Unix spooler and automatic switch on Sun and Decstations. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALERT NUMBER 4.1-11: Modem Installation Describes modem installation of Everex and Telebit on Sun plus Everex on Pmax and Sparcstations. ALERT NUMBER 4.1-12: Using the Net Layer Rule to Control Routing on Layers Describes the Route on Layer feature of the Net Layer Rule Form. ALERT NUMBER 4.1-13: Controlling DRC's Created by the Router Tips on handling the DRCs created by the batch router. ALERT NUMBER 4.1-14: Routing with Multiple Line Widths and DRC Rules Tips on routing a board with many line widths and many DRC rules. ALERT NUMBER 4.1-15: 4.0 Gloss Performance Tips on improving your glossing performance. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 ALERT NUMBER 4.1-16: Allegro's Use of Sun Color Hardware Information pertaining to the color. ALERT NUMBER 4.1-17: Converting 3.x to 4.0 Scripts Explanation of process to convert scripts. ALERT NUMBER 4.1-18: 4.0 Diagnostic Test Describes the test for verifying basic allegro functionality. ALERT NUMBER 4.1-19: Thermostats Properties A description of the properties utilized by the Allegro ThermoSTATS program. ALERT NUMBER 4.1-20: Automatic Aperture Editor Tips on using the new feature that automatically generates artwork apertures. ALERT NUMBER 4.1-21: Allegro 4.x Menu Modifications Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* * * * * * * * U.S. CUSTOMER SUPPORT INFORMATION * * * * * * * * * *.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.*.* 1-800-447-2253 Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 The Customer Support Center Helpline provides technical assistance to Valid customers with application, software, hardware and system questions. FEATURES o Special "800" toll-free number provided for single source access to Valid's support organization. o Guaranteed response time. o Well trained industry experienced Application Engineers work with you via the phone. o Coverage from 8:00 am to 5:00 pm local time. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 DESCRIPTION Through a special "800" toll-free number, the Customer Support Response Center records your assigned system ID number and all pertinent information about your problem. The Customer Support Center then dispatches it to the next available Application Engineer if it is deemed to be a software problem and to the appropriate hardware organization if it is deemed to be a hardware problem. You are guaranteed a maximum response time of two hours (2) for software and eight (8) for hardware during regular working hours; normally your questions will be handled immediately depending upon availability of application engineers and the complexity of the problem. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 All your calls are documented and tracked for history analysis. Upon completion of the analysis a Field Support Engineer may be assigned to go on site to work more closely with the customer due to the complexity of their problem or communicating to our engineering staff of the high volume of calls on a particular application that perhaps should be reviewed. The Customer Support Center offers guaranteed response from our most experienced Application Engineers who have the support of the Customer Support department and Valid Engineering. ORDERING INFORMATION For further information, please contact your local Sales Office. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 The Customer Support Center provides a Bulletin Board called VUnet (Valid Users network) which allows the customer to access a variety of information via modem. FEATURES o User area with technical questions and answers posted by customers to each other. o Technical area where Application Notes, workarounds or "Product Alerts" are submitted by our Application Engineers. o News area with information from our Internal Departments ranging from User Group news to Marketing announcements. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 o Course/Class listings with up-to-date class schedules. o Current software version listings. DESCRIPTION A 2400 baud modem is available to the customer with each Maintenance contract. A password and user documentation is sent to each customer after the receipt of the registration form. After a connection, the Valid users have access to technical information posted by other customers and Valid employees. Any information that involves the customers is available on VUnet. ORDERING INFORMATION For further information, please contact your local Sales Office. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 The Customer Support Center has a Tracking Center that allows the customers to report Software Problem Reports (SPR) when they find a software defect, documentation error or an enhancement they would like to see in a future application release. FEATURES o 24 hour response upon receipt of the SPR. o SPR's are tracked by each customer. o Weekly meetings are held to review the open SPR's by our highly technical staff, Engineering and Marketing. o Monthly reports are available upon request. Valid Logic Systems, Inc <<<<< Readme >>>>> Allegro 4.1.2 P1 DESCRIPTION The SPR form is received into our Customer Support Tracking Center and logged onto our system. An acknowledgement letter is generated within 24 hours upon receipt of the SPR and sent to the customer. Should an urgent SPR be received, it is immediately hand carried to engineering to start an investigation. If more information is required, a letter is sent requesting the proper data. When an SPR has been reviewed by the proper department, an updated letter is sent describing the recommended action or what actions have been taken. Should the customer wish to review their SPR's, a report will be generated and sent. ORDERING INFORMATION For further information, please contact your local Sales Office. ********** END OF FILE *********