5.0 Analysis Tutorial - Verifying terminators

For ECL it is important to properly terminate each net to avoid
unacceptable noise from reflections.  The value of the termination
resistor should roughly match the nets cline impedance.  If the wrong
value resistor is connected or if no termination resistor connection
has been made an excessive reflection will occur.  Reflections are the
cause of large overshoot, and undershoot, and can also cause timing
violations such as excessive "Final Settle Delays".

SNA relies on correct modeling of termination resistors in their device library
definitions.  They must have "VALUE" and "TERMINATOR_PACK" properties
on their library device definitions.  Value properties on GED resistor
instances are NOT recognized by ALLEGRO.  (Value on instances is too
vague a property, Allegro requires the unambiguous library entries).

 *******************************************
 Press <F1> to continue to next frame ...
 *******************************************
