5.0 Analysis Tutorial - Controling line impedance

Small reflections occur whenever their is a discontinuity in the
etch line impedance.  Impedance of a line is a function of its width
and its position relative to its neighboring shield layers.  Layers
closer to shield planes need thinner widths to match the impedance
of lines further from these planes.  Necking down line width to
squeeze through congestion or missmatched impedances between layers
contribute to noise.  Even more significantly each impedance 
discontinuity can slightly degrade the timing.  (The propagation 
time which is a simple function of length does NOT react to line
impedance discontinuities. However the predicted First switch time 
includes rise-or-fall time distortion which are highly dependent
on matching impedance along the entire net.)

Use the Show->Parasitic command to report the impedance of several
clines.

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 Left click in the world view to see BUSADSL highlighted white.
 Edit->change the cline width of a cline in BUSADSL to a silly width
 of 1 (Fillin 1 CARRIAGE RETURN as the new line-width in the mini-
 status window at the extreme lower right of your screen.
 Then pick the cline. With the cursor in the layout window, pulldown
 the middle button and "Done" the change. Show->parasitic
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 to see how this narrowed cline has a much higher impedance than normal
widths on its layer.
 
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 Analyze again to expect to see slowed switch delay (.362 -> .378ns)
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 Press <F1> to continue to next frame ...
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