\chapter{Management approach}

\section{Introduction}

Inasmuch as the Massachusetts Institute of Technology's Laboratory for
Computer Science has been a contractor to DARPA/ONR for the last 24 years,
and its general management procedures are well known to DARPA, we shall
confine our remarks in this section to the management issues that are
specific to the proposed project.

\medskip

The proposed project involves a significant new hardware and software effort---as
well as continuation and extension of ongoing general reasearch.
The software will be developed entirely within MIT.  The hardware is to be
built in three stages:
 \begin{itemize}
 \item A single \cam-8 module.
 \item A 32-module prototype.
 \item A 256-module installation
 \end{itemize} 
    The first stage will be designed and assembled by MIT,
with the fabrication of ICs, {\sc pc}-boards etc.\ commissioned outside;
for the second and third stages, complete subassemblies will be commissioned
outside and then merged by MIT.

Each stage will be made available for evaluation in-situ to prospective users
outside MIT as it becomes operative. Arrangements may be made, if desired,
to have a ``release'' version of the prototype distributed outside during the
third year.

\medskip

MIT already has a solid foundation for both the hardware and the
software effort.  Though much more ambitious, the \cam-8 project will
bear a family relationship with \cam-6---a small cellular automata
accelerator board currently in commercial production.

\section{Plan of CAM-8 development}

In this architecture, large amounts of raw \dram\ and \sram\ are turned
respectively into the {\em state variables} and the {\em transition
function} of a simulation model by a sophisticated \vlsi\ {\em
controller chip}, several thousand replicas of which will be working in
lockstep.

\majpar{Controller chip} The functional specifications of the controller
chip are already complete, and the main implementation trade-offs have
already been addressed and resolved.  The chip will be designed directly
by us during the first six months of the project, and then fabricated by
a commercial vendor.  Though the original version of the chip will in
principle be useable for a full-scale version of \cam-8, we anticipate a
second iteration at the beginning of the third year, to take advantage
of the accumulated experience and of possible major developments in
algorithms and models.

\majpar{Processor board} A {\em module} of \cam-8 will consist of 16
controller chips, 16 \dram{}s and 16 \sram{}s.  Four modules will fit on
a single surface-mount printed-circuit board.  A \cam-8 installation
will comprise from one to several thousand boards (256 for a
nominal-size machine).  The board wiring list will be specified by us;
layout, routing, and fabrication of the printed-circuit board, as well
as component assembly, will be done by commercial vendors.  A second
iteration at the beginning of the third year (see above) is likely.

\majpar{Host and host interface} During the first year we shall select
and purchase a suitable host---such as a Sun workstation; the host will
be tightly coupled with \cam-8 through a functionally simple but very
fast interface.  Development of low-level interfacing and driving
software will begin during the first few months, with particular urgency
for those features that will have to be emulated in order to exercise
the chip simulator on the VLSI-design workstation.  

\majpar{Prototype} A 1/32-size prototype (the reference is always the
nominal-size unit defined in Section \ref{structure}) is targeted to be
completed by the middle of the second year.  Card cage, power supply,
wiring harnesses, etc.\ will be designed, with our collaboration, by
outside engineers, and manufactured by a commercial vendor.
This design will keep in mind the needs of a machine up to 64 times
the nominal size.

The prototype will consist of 32 processors, with a total throughput of
approximately 1 billion 16-bit cell updates per second. It will already
represent a major advance in the computational state-of-the art for many
physical problems of interest, and we shall start using it in this role
as soon as it is operative.

\majpar{Control software} The intermediate-level control software will
be a natural evolution of the well-tested software that is used for
running \cam-6, and will be produced during the second year.

\majpar{Applications software} Higher-level software will consist of of
{\em modeling environments} complemented by general-purpose utilities,
systematically expanding the approach of \cite{cambook}.

\majpar{Mass storage} We'll also provide drivers for interfacing with
suitable fast-access mass storage devices (for downloading and uploading
experiment data); however, at this stage we do not intend to install
more than token amounts of fast mass storage.

\majpar{Delivered machine} We plan to complete a quarter-size
machine (or larger if \darpa\ prefers; cf.\ below), consisting of 256
processors, host, and interface, by the middle of the third year,
and deliver it with full software, documentation, and representative
applications by the end of the third year.

By strictly replicating this hardware, and with no change in the
software, the end user will be able to synthesize much larger
installations (up to 64 times the nominal size, corresponding to over a
Tera-event/sec).


\majpar{Testing and evaluation} Testing and evaluation will proceed
by stages, at the level of (a) single controller chip, (b) module,
(c) 1/32-size prototype, and (c) 1/4-size delivered machine.
Representative application models will be used for exercising
hardware and software and evaluating effective performance at levels
(b), (c), and (d).


\section{Third-year options}

The final design for the larger machine (1/4 of nominal size) to be
delivered at the end of the third year will reflect and take advantage
of any significant developments in cellular automata models, algorithms,
and technologies that might have taken place during the first two years
of the project.

Depending on the above developments and other considerations,
if preferred, by the end of the second year \darpa\ may commission
instead a {\sl full} nominal-size machine, for a proportionate increase
in funding and a somewhat later delivery date.  Another option at this
stage is to produce and distribute for use by the scientific community a
number of smaller size machines (e.g., upgraded copies of the 1/32 size
prototype).

\section{Industrial partner}

We plan to select and involve in our plans an industrial partner,
as LCS did in the case of the ``Dataflow'' project. To this purpose,
early in the first year we shall organize a meeting with potential
industrial partners. Our intent shall be to secure the direct involvement
of a suitable industrial partner as early as possible in the practical
phases of this research.

The management approach for this collaboration will substantially
parallel that followed by LCS in the case of the ``Dataflow'' project.

\section{Methodology and algorithms}

Throughout the three-year period, we shall continue to devote a
substantial part of our efforts to theoretical and methodological
issues, with particular stress on themes that can benefit from the
availability of \cam-8.

\section{Personnel}

Most of the research and development will be done directly by 
the Investigators named in this proposal, with the collaboration of two
or three graduate students, one or more professional systems
programmers, and possibly some undergraduate students. The work
atmosphere will be that of a small team strongly focused on this
project.

\chapter{Cost summary}
