Rooster - Ruben Agin

My Background

I officially graduated from MIT on June 6, 1997, recieving my BS and Master of Engineering (M.Eng.) in Electrical Engineering and Computer Science. I was here for four years as an undergraduate and one year as a graduate student. Phew, it seemed more like ten years. Now, I am at greener pasteurs, literally speaking, in Texas, working as a Design Automation Engineer in the DA group at Cyrix Corporation, in Richardson, TX. They design alternative, Intel-compatible chips. I am currently responsible for the design and implementation of a software tool called SQuID, which will check circuit designs for design rule violations specified by the clients. I have been working there since February 9, 1998 and can still be reached at the e-mail address at the bottom.

My (Former) Research

I worked for the Information Mechanics Group . At IM, I have been experimenting with simulating reconfigurable logic circuitry on CAM-8. A cellular automaton is a grid of finite state machines which change state according to the state of their neighbors. With appropriate rules, the cellular automaton can be thought of as a substrate which can be configured as a logic circuit. You simply lay out your circuit on the grid of cells and run the rule. The cellular automaton will simulate signals which travel between cells and each cell has a fixed set of logic, programmed at the start which can do routing, logic, and storage functions. This is similar to what is done in an FPGA where there is a fixed set of programmable logic blocks with programmable interconnect. Each cell can simply be thought of as a programmable logic block. For more information on this, see my paper Cellular Automata Logic Simulations. Here are some specific circuits which have been laid out and simulated in CAM-8. I am also experimenting with various techniques for synthesizing reconfigurable logic circuits. More specifically, I am using a technique called spacetime wires for simulating reconfigurable logic faster on CAM-8. The idea behind spacetime wires is that you lay out your circuits in both space and time. Looking at one particular cell through time, the logic function may exhibit a time evolution along with the data. This is similar to dynamically reconfigurable logic or virtual logic. Prototypes of chips which operate in this way have recently been fabricated for the first time and are known as dynamically programmable gate arrays (DPGA's). This chip was fabricated under the Reinventing Computing initiative at the AI lab. All of this type of research can be useful to the notion of reconfigurable computing. Since CAM-8 updates cells in this fashion already, by time-multiplexing its LUT's among the cells which are stored in DRAM, it is suited to perform these types of computations optimally. In addition, there are other issues. CAM-8 supports multidimensional simulations and is indefinitely extensible in three dimensions. So, for instance, three dimensional chips can be simulated. The data transport is also unique and provides some challenging research issues in placement and routing. There are many other issues that need to be dealt with as well. The topic of my master's thesis is finding a way to synthesize logic for efficient simulation on CAM-8 and I must look at all these issues. One of the major motivating factors behind all this is that cellular automata are ideal candidates for microscopic architectures. That is, as device dimensions shrink and devices get packed closer and closer, interconnect will be harder to fabricate (as well as being tighter) and logic functionality will have to be more compressed. Nanotechnology is already working on generic solutions to exploiting nature to make ultra-small devices. Since CA represent nearest-neighbor interconnect, there is no wiring necessary, and the smaller one can make the logic cells, the more cells we can fit into a grid. CA are fine-grained enough to be ideal parallel architectures for making reconfigurable logic. For the past two summers, I worked at Texas Instruments in the Nanoelectronics Group.

People to See

Hank Eng
David Harris
Grant Ho
Rob Ristroph
Bob Steinhoff
Hao Tang
LeMoey Wiebush

Places to Go

The Nanoelectronics and Nanocomputing Home Page
NDR Group Homepage (Nanoelectronics)
PhysComp '96
Design Automation Links
UCBerkeley Design Technology Warehouse
Quantum Computation References
Southwest Research Institute in San Antonio
MIT AI Lab Reinventing Computing
MIT AI Lab Reversible Computing Project

Ruben Agin
Last modified: Tue Sep 8 16:25:29 CDT