Derivatives and Feedback
Derivatives of a 32-bit 4-GPR embedded RISC processor
Synopsys RTL Analyzer reports GTECH area and gate delays (no wiring or load model)
simple 2-stage 3-stage 3-stage,2-way
Delay 30+X max(18+X,25) max(6+X,25) max(8+X,31)
unit area=1 NAND unit delay=1 NAND